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Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
Description
The M65580MAP-XXXFP are semiconductor integrated circuits designed with CMOS silicon gate technology for NTSC television system, include 8bit MCU( M37272MA core) with a closed caption decoder and circuits needed for TV baseband signals(Video and Chroma) processor and Deflection in a chip. PCB area and EMI noise can be reduced by one chip and 80QFP, and internal connection of OSD signals. And it can realize a adjustment free system by built-in MCU and get a high performance adaptive YC separation by 1 line memory. The above technology makes its performance more stable and better.
Feature
* Y/C processor : 8bit Input, 10bit Output digital processing * Deflection processor : optimized system by conventional analog and digital mixed solution * ADC&DAC : 8bit high speed video ADC & 10bit high speed video DAC [MCU Block] MCU(single microcomputer) in this IC has almost same function and performance as M37272MA-XXXSP/FP in mass-production. And it is operated by simple instruction in the same memory space as that of built-in ROM, RAM, I/O. 2 It has a OSD, data slicer , and I C-BUS interface. So it is very useful for a channel selection system for NTSC TV with a closed caption decoder. [ASIC Block] ASIC block consists of the following blocks. (1) Analog frontend block ; Analog SW(2 CVBS(TV&EXT) inputs, Y/C signals to one signal, 2 channels 8 bit high speed video ADCs, and ACC amplifiers (2) Video and Chroma block ; A high performance 2 line adaptive YC separation by 1 line memory, Video blocks including sharpness, YNR, a high performance blackstretch circuits, Chroma decoder, and RGB matrix including OSD mixing circuit. (3) Deflection block ; A high performance sync separation by analog and digital mixed solution (4) Analog backend block ; 3 channels 10 bit high speed video DACs for Cutoff & Drive, and Mute circuit.
Application
NTSC TV with a closed caption decoder
PIN CONFIGURATION (TOP VIEW)
P01/PWM1 P02/PWM2 P03/PWM3 P04/PWM4 P05/AD3 P06/INT2/AD4 P07/INT1 P23/TIM3 P24/TIM2 P25/AD5 HLF VHOLD CV IN CN VSS X IN X OUT
65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
P00/PWM0 P14/SDA2 P13/SDA1 P12/SCL2 P11/SCL1 P10/OUT2 P31/B P30/G P53/OUT1 P52/R P51/VSYNC P50/HSYNC IN/OUT V-PULSE OUT OSD(R) IN FAST BLK OSD(G) IN OSD(B) IN HALF TONE SCL SDA H OUT FBP IN VDD(DEF) VSS(DEF)
M65580MAP-XXXFP
NECK PROTECTOR HVCO F/B V-RAMP OUT AFC1 FILTER X-RAY PROTECT X-TAL CHROMA APC FILTER VDD(VCXO) B OUT VSS(OUTPUT) G OUT VDD(OUTPUT) R OUT VZ OUT TV IN VRB
VSS FILT VCC P27/XCOUT P26/FSCIN/XCIN RESETB P22/SIN/AD8 P21/SOUT/AD7 P20/SCLK/AD6 P15/AD1/INT3/FSCIN P16/AD2/TIM2 VSS(DIGITAL) OSD CLK VDD(DIGITAL) CLK OUT RESETB(ASIC) SYNC SEP IN Y SW OUT VDD(INPUT) EXT IN VSS(INPUT) Y IN VRT C IN
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
MITSUBISHI
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Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Chroma APC Filter
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
Block Diagram(Whole)
Neck Protector Vdd(VCXO) AFC1 Filter Vdd(Input) Vss(Input) Vdd(DEF) Vss(DEF)
V-RAMP OUT
33 19 21 25 23 42 41 37
44 43 40 35 34
38 39
VZ OUT Vss(OUTPUT) Vdd(OUTPUT)
27 31 29
HVCO F/B
FBP IN
H OUT
XTAL
Vrb
Vrt
36 12 14 16 26
X-ray Protect Vss(Digital) Vdd(Digital) RESET CVBS/YC input RGB OUT TV IN C IN Y IN EXT IN
17 18
SYNC SEP IN Y SW OUT
24
SIGNAL PROCESSOR
Intelligent Monitor
22 20
13
CLK-2 OUT 3bit Digital OSD 32 30 28 15 B OUT G OUT R OUT HALF TONE
45
SDA
FAST BLK
46
SCL
HD
VD
CLK(fsc) OUT INTELLIGENT MONITOR
48 49 51 50 53 56 58 57 55 Vss Vcc To TV IN of ASIC 1 3 77
OSD(B) IN OSD(G) IN OSD(R) IN FAST BLK OSD H-SYNC FAST BLK OSD(R) OUT OSD(G) OUT OSD(B) OUT FAST BLK HALF TONE OSD HD VD 78 CNVss HALF TONE OSD V-SYNC OSD V-SYNC HALF TONE 11 59 52 54 47
CV IN
79 80 5 FSC IN 6 2 RESET
X IN X OUT
75
HLF
CCD
MCU CORE M37272MA
RESET FILT
76 SCL SDA P12/SCL2
VHOLD
2in1 Tuner
60 62 61
10
P15/AD1/INT3 P20/SCLK/AD6 P21/S OUT/AD7
I/O PORT
9 8
EEPROM
63 64 65 66 67 68 69 70 71 72 73 74
4
7
P06/INT2/AD4
P27/XCOUT
P22/S IN/AD8
P14/SDA2
P00/PWM0
P01/PWM1
P02/PWM2
P03/PWM3
P04/PWM4
P05/AD3
P07/INT1
P23/TIM3
P24/TIM2
P25/AD5
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Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
Absolute maximum ratings
Symbol
VDD (MCU) VDD (ASIC5V)
Parameter
Supply voltage (MCU) Supply voltage (ASIC5V)
Conditions
Ratings
-0.3 to 6.0
Unit
V V V V V mA mA
VDD (ASIC3.3V) Supply voltage (ASIC3.3V) VI (MCU) VO (MCU) IOH (MCU) IOL1 (MCU) Input Voltage (MCU) Output Voltage (MCU) Circuit current (MCU) Circuit current (P00-P07, P10, P15, P16, P20-P27, P30, P31, P52, P53) IOL2 (MCU) VID (ASIC) IOUT (ASIC) Pd Kt Topr Tstg Circuit current (P11-P14) Digital input voltage Analog output current Power dissipation Thermal derating Operating temperature Storage temperature
All voltage are based on Vss.Output transistors are cut off.
-0.3 to 6.0 -0.3 to 4.0 -0.3 to Vcc+0.3 -0.3 to Vcc+0.3 0 to 1 (See note 1) 0 to 2 (See note 2)
0 to 6 (See note 2) -0.3 to Vcc+0.3 -30 1460 14.6 -20 to 65 -40 to 125
mA V mA mW mW/ C C C
Recommended operating condition
Symbol
VDD (MCU) VDD (Digital) VDD (Input) VDD (Output) VDD (VCXO) VDD (DEF)
(Ta=-20 to 65 C, unless otherwise noted) Limits Min.
4.75 4.75 3.13 3.13 4.75 4.75
Parameter
Supply voltage (MCU) (See note 3) Supply voltage (Digital) Supply voltage (Input) Supply voltage (Output) Supply voltage (VCXO) Supply voltage (DEF)
Typ.
5.0 5.0 3.3 3.3 5.0 5.0
Max.
5.25 5.25 3.47 3.47 5.25 5.25
Unit
V V V V V V
VIH1 (MCU) VIH2 (MCU) VIH3 (ASIC) VIL1 (MCU) VIL2 (MCU) VIL3 (MCU) VIL4 (ASIC) IOH (MCU)
High Input voltage P00-P07, P10-P16, P20-P27, P50, P51, RESETB, XIN High Input voltage SCL1, SCL2, SDA1, SDA2 (When using I2C-Bus) High Input voltage RESETB, FBP IN, HALF TONE, OSD(R/G/B) IN, FAST BLK Low Input voltage P00-P07, P10-P16, P20-P27 Low Input voltage SCL1, SCL2, SDA1, SDA2 (When using I2C-Bus) Low Input voltage (See note 4) P50, P51, RESETB, XIN, TIM2, TIM3, INT1, INT2, INT3, SIN, SCLK Low Input voltage RESETB, FBP IN, HALF TONE, OSD(R/G/B) IN, FAST BLK High average output current (See note 1) P10-P16, P20-P27, P30, P31, P52, P53
0.8Vcc 0.7Vcc 0.8Vcc 0 0 0 0
Vcc Vcc Vcc 0.4Vcc 0.3Vcc 0.2Vcc 0.2Vcc 1
V V V V V V V mA
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Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
Limits Symbol
IOL1 (MCU)
Parameter
Low average output current (See note 2) P00-P07, P10, P15, P16, P20-P27, P30, P31, P52, P53
Min.
Typ.
Max.
2
Unit
mA
IOL2 (MCU) f(XIN) (MCU)
Low average output current (See note 2) P11-P14 Oscillation frequency (for CPU operation) XIN (See note 5) Oscillation frequency (for sub-clock operation) XCIN Oscillation frequency (for OSD standard clock) FSCIN Input frequency TIM2, TIM3, INT1, INT2, INT3 Input frequency SCLK Input frequency SCL1, SCL2 Input amplitude video signal CVIN 1.5 2.0 7.9 8.0
6 8.1
mA MHz
f(XCIN) (MCU) FSCIN (MCU) fhs1 (MCU) fhs2 (MCU) fhs3 (MCU) VI (MCU)
29
32 3.58
35
kHz MHz
100 1 400 2.5
kHz MHz kHz V
Note 1: The total current that flows out the MCU must be 20mA or less.
2: The total input current to MCU (IOL1+IOL2) must be 30mA or less. 3: Use a quartz-crystal oscillator or a ceramic resonator for the CPU oscillation circuit. When using the data slicer, use 8MHz. 4: Pin name in each parameter is described pin names. (1) Dedicated pins: dedicated pin name. (2) Double-/Triple-function ports. When the same limits: I/O port name. When the limits of function except ports are different from I/O port limits; function pin name. 5: P06, P07, P15, P23, P24 have the hysteresis when these pins are used as interrupt input pins or timer pins. P11-P14 have the hysteresis when these pins are used as multi-master I2C-Bus interface ports. P20-P22 have the hysteresis when these pins are used as serial I/O pins.
Thermal derating
THERMAL DERATING (MAXIMUM RATING)
POWER DISSIPATION Pd (W) 2.0 1.5 1.46 1.0 0.88 0.5
0
25 50 65 75 100 125 150 AMBIENT TEMPERATURE Ta (C)
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Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
[MCU Block(M37272MA)]
Description
MCU(single microcomputers) in this IC has almost same function and performance as M37272MA-XXXSP/FP in massproduction. And it is operated by simple instruction in the same memory space as that of built-in ROM, RAM, I/O. 2 It has a OSD, data slicer , and I C-BUS interface, so it is very useful for a channel selection system for NTSC TV with a closed caption decoder.
Features
* Number of basic instructions * Memory size ROM RAM -------- 71 -------- 40Kbytes -------- 1152bytes (ROM correction memory:64bytes included) --------- 0.5s
* minimum instruction execution time (at 8 MHz oscillation frequency) * Power source voltage -------- 5V10% * Subroutine nesting -------- 128 levels(max.) * Interrupts -------- 17bytes 16vector * 8-bit timers -------- 6 * Programmable I/O ports(Ports P0,P1,P2) -------- 23 * Input ports(Ports P50,P51) -------- 2 * Output ports(Ports P30,P31,P52,P53) -------- 4 * Serial I/O -------- 8-bit x 1channel 2 -------- 1(2 systems) * Multi-master I C-BUS interface * A-D comparator (7-bit resolution) -------- 8 channels * PWM output circuit -------- 8-bit x 5 * ROM correction function -------- 32 bytes x 2 Power dissipation -------- 165mW (at Vcc=5.5V, 8MHz oscillation frequency, OSD on, and Data slicer on) * Closed caption data slicer * OSD function Display characters -------- 32 characters x 2 lines(possible to display 3 lines or more by software) Kinds of characters 254 kinds Character display area CC mode : 16x26 dots OSD mode : 16x20 dots Kinds of character sizes CC mode : 1 kind OSD mode : 8 kinds Kinds of character colors 8 colors(R,G,B) (coloring unit: a character) Kinds of background colors CC mode : 1 kind(black) OSD mode : 8 kinds(possible to select color in character unit) Display position horizontal : 128 levels Vertical : 512 levels Attribute CC mode : smooth italic, underline, flash, automatic solid space OSD mode : border(black) Kinds of raster colors 8 kinds Smooth roll-up Window function
MITSUBISHI
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Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
[ASIC Block]
Description
CVBS(TV/EXT) signals or Y/C signals input to this IC are converted to 8 bit digital signal by 2 channels high speed video ADCs. These signals are input to digital section to obtain high performance R/G/B signals. First, CVBS signals are separated to high quality Y/C signals by 2 dimensional adaptive YC separation circuit, and then Y/C signals are converted to R-Y&B-Y signals by digital chroma decoder, after that, to R/G/B signals by RGB matrix circuit. These signals are mixed with OSD signals come from MCU block, are converted to analog R/G/B signals by 3 channel 10 bit high speed video DACs. In deflection block, to get a better Horizontal & Vertical signals, a conventional analog solution by analog CMOS technology is used. ASIC block consists of the followings blocks. (1) Analog frontend block ; Analog SW(2 CVBS(TV&EXT) inputs, Y/C signals to one signal), 2 channels 8 bit high speed video ADCs , and ACC amplifiers (2) Video and Chroma block ; A high performance 2 line adaptive YC separation by 1 line memory, Video blocks including sharpness, YNR, a high performance blackstretch circuits, Chroma decoder, and RGB matrix including OSD mixing circuit. (3) Deflection block ; A high performance sync separation by analog and digital mixed solution (4) Analog backend block ; 3 channels 10 bit high speed video DACs for Cutoff & Drive, and Mute circuit.
Features
[Video/Chroma Block] * Built-in 1 Video SW for TV/EXT signal input * 2 additional pins for S(Y/C) input * YUV input signal available ( T.B.D ) * 2 channel 8 bit Video ADCs for CVBS(TV&EXT) or Y/C signal inputs * Built-in adaptive 2 line comb filter(2DYCS) => Few dot crawl&crosscolor, and clear color transition * Built-in a high performance Blackstretch => Dynamic & detailed picture * Digital Luminance delay circuit => stable Y/C timing adjustment * Built-in VCXO circuit(4fsc) * High resolution R/G/B output => Built-in 10bit high speed Video DACs * Internal connection of 8 color digital OSD ( R/G/B, F.B, H.T ) * Reference CLK output for tuner (fsc or 4MHz) * Built-in YNR ( about fsc1MHz) * Gamma correction(for R/G/B signals) [Deflection Block] * Analog(conventional) sync separation * Double AFC Circuit * Built-in Horizontal reference Oscillator * HD and VD pulse by Countdown * Built-in digital Vramp generator
2
=> => => =>
Better performance by abundant experience Stable Horizontal scanning No ceramic resonator and Adjustment free Stable HD&VD
[List of main I C bus controllable Items] * Chip : Power-down mode * Analog Input Stage : CVBS/Y&C Input SW * Luminance Processing : Sharpness, Blackstretch * Chroma Processing : Color, Tint, Killer level * RGB Matrix : ACL, OSD Input Level, Contrast, Brightness * Analog Output Stage : Drive adj.(R/G/B), Cutoff adj.(R/G/B) * Deflection Block : H-Phase, V-size, V-shift, V-Linearity
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Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
ASIC Block Detailed Diagram
MITSUBISHI
7
Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
Function and Outline of ASIC Block
Chip Power down mode : 3 modes [ PD0 & PD1 & PD2 ] Service SW : stop of Vertical(Vramp) output ( For cutoff adjustment ) Analog Block * Input stage => CVBS&Y/C input signals Input level (CVBS) : 1.23Vp-p (173IRE) @max. / 1.0Vp-p @typ. Input level (Y/C) : Y:1.00Vp-p (140IRE) @typ./ C:0.7Vp-p @typ. * Output stage => RGB output signals Output level : 0.7 Vp-p (typ.) Drive(R&G&B) : -3 to +4 dB by 7bit (White Balance) Cutoff(R&G&B) : 0.5 V by 9bit (Start lighting point) Digital Block * 2DYCS Adaptive YC separation by using of 1H line memory and original algorithm * Luminance processing Contrast : 0 to 200 LSB by 7bit Brightness : -20 to 20 LSB by 8bit (Pedestal DC level) Sharpness : 0 to 3 dB by 5bit (by 0, 70, 140, 210ns) Delay adjustment : 0 to 210 ns by 2bit(70ns step) to Chroma signal Blackstretch : 3 selectable stretch point [ Stretch areas ( 0 to 25/30/40IRE ), Through areas ( 25/30/40IRE ~ ) ] 4 selectable blackstretch curves ( 1/4, 2/4, 3/4, 4/4) * Chroma processing Tint : -45 to 45 degree by 7bit => about 0.7 degree : Variable demodulator (R-Y) axis (-22.5 to +22.5 degree by 6bit => about 0.7 degree) Color : 0 to 200 % by 7bit * RGB matrix ACL EXT/RGB BlueBack Mute Neck Protector Deflection Block * Horizontal Output AFC2 phase Hold => Shut down AFC1 gain * Vertical Output V position V size Linearity : Matrix(R-Y signal) ratio selectable (12/8, 13/8, 14/8) 2 : Automatic Contrast Limiter by MCU port(ADC) and I C bus : clip to 7LSB @ data < 0Fh : ON/OFF selectable : ON/OFF of R/G/B output : R/G/B output to zero( no signal)
: +5 to -5s by 5bit : fh@Hold-down : in about 16.5KHz => fh@Shutdown : H-STOP : Normal/High selectable for VTR skew : 0 to 16 H by 3 bit => 2H unit(connected with BLK) : 1.4 to 2.6 V by 7bit : 0 to 30 % by 7bit
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Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
Application Examples
5V
SW REG REG
0.1u 2K 15p 15p 470p
+200V ACL In FBT
0.1u
80
79
78
77
76
75
74 74
73
72
71
70
69
68
67
66
65
1 470p 2 0.1u
Vss FILT VCC
P00/PWM0 P14/SDA2
64 63 62 61 10K 10K
3
P13/SDA1
4
P27/Xcout
P12/SCL2 P11/SCL1
SDA
Reset
5 6 P26/FSCin Reset In
60 59
P10/OUT2
SCL
7 8 9
P22/Sin/AD8 P21/Sout/AD7
MCU
P31/Bout P30/Gout
58
57
P20/SCLK/AD6
P53/OUT1
56
POWER ON H
10 0.01u 11 1M 0.1u 470p 13 CLK-2 Out VD out 52 P16/AD2/TIM2 (Int. Mon. In/Out) P51/Vsync 54 P15/AD1/INT3 P52/Rout 55
12
Vss(Dig)
P50/Hsync In/out
53
5V
14
Vdd(Dig) CLK(fsc) Out
R(OSD) in
51 50
15 16
Digital Block
F.B in
Reset In
G(OSD) in
49
17 0.1u 18
Sync Sep. In
CVBS(x2) Out
3.3V
Video det out (1.23Vp-p) EXT In (1.23Vp-p)
0.1u
560 19 0.1u 20 TV in Vdd(Input)
ASIC
Analog Block
B(OSD) in
48
H.T in
47 46
SCL
SDA
45
21 0.1u 22 0.1u 23
Vss(Input)
H OUT
44
H-Pulse Out FBP in
EXT in
FBP IN Vdd(Def) Vss(Def.) NECK PRO
43
Vrt Yin
42
Y In (1.00Vp-p)
0.01u
24
41
5V
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39 39
40
C In (0.70Vp-p)
0.1u 0.1u
5V 3.3V
-
150V
DY
1.5K
5V
REG
3.3V
REG
9V
REG 1.5K to H DRIVE
FBT
1.5K
MITSUBISHI
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Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
Electrical characteristics
(Ta=25C, Vdd=5.0V, 3.3V)
Symbol Parameter Input signal Pins SG Test point Min. Limits Typ. Max. Unit Remarks
ICC
ICC50 ICC33
Standard conditions 5.0V supply current 3.3V supply current 3,14, 33,42 18, 29 102 47 116 56 130 65 mA mA Supply of MCU, Digital, VCXO and Deflection Supply of A/D and D/A
VIDEO Standard conditions of video character
2AGTV Video SW output level (TV input) 2AGEV Video SW output level (External input) Vtyp FBY Y/C1 Y/C2 Y/C3 YDL0 YDL1 YDL2 YDL3 GTnor Video standard output Video frequency characteristics Y/C separation function 1 Y/C separation function 2 Y/C separation function 3 Y total delay time Y delay time 1 Y delay time 2 Y delay time 3 Video tone control characteristic 1
26 20 26 26 26 26 26 26 26 26 26 26 26 26 26 26
SG.A SG.A
18 18
1.5 1.5 590 -3 -3 2.4 50 50 50 640 1 -7 20 -9
1.7 1.7 740 0 -30 0 -30 3.0 70 70 70 800 2.5 -4 50 -6
1.9 1.9 890 3 -20 3 -20 3.6 90 90 90 960 4 -1 80 -3
Vpp Vpp mVpp dB dB dB dB sec nsec YDL1=measure - YDL0 nsec YDL2=measure - YDL1 nsec YDL3=measure - YDL2 mV dB dB mV dB f=2.5MHz f=2.5MHz f=2.5MHz Vy=0.18V, 45H=80h(BLS ON) / 00h(BLS OFF) f=5MHz feb=fec=fsc feb=fsc, fec=fsc1/2fH feb=fsc, fec=fscfH
SG.A 28,30, 32 SG.B 28,30, 32 SG.E 28,30, 32 SG.E 28,30, 32 SG.E 28,30, 32 SG.A 28,30, 32 SG.A 28,30, 32 SG.A 28,30, 32 SG.A 28,30, 32 SG.B 28,30, 32 SG.B 28,30, 32 SG.B 28,30, 32 SG.D 28,30, 32 SG.A 28,30, 32
GTmax Video tone control characteristic 2 GTmin BLS HT Video tone control characteristic 3 Black stretch characteristic Half Tone function
MITSUBISHI
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Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
Symbol
Parameter
Input signal Pins SG SG.E SG.E SG.E SG.E SG.E SG.E SG.E SG.E
Test point Min. 28 32 28 28 28 28 28 28 155 275 -3 -3 -40 400 0.47 85 160 30 -60 3.578 350
Limits Typ. 180 310 0 0 -35 -40 0.57 90 200 0 45 -45 3.579 500 Max. 205 345 3 3 -30 -28 -400 0.67 95 240 10 60 -30 3.580 650
Unit
Remarks
Standard condition of CHROMA chroma parameter CnorR CnorB ACC1 ACC2 VikN KillP APCU APCL DEMR DEMP Chroma standard output (R-Y) Chroma standard output (B-Y) ACC characteristic 1 ACC characteristic 2 Killer operation input level Color residual at Killer on APC pull-in range (upper) APC pull-in range (lower) Demodulated output ratio Demodulation phase angle
26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26
mV mV dB dB dB dB Hz Hz deg % % deg deg MHz mVpp
5DH=03h feb=fec+50kHz feb=fec+50kHz Veb, Vec : +6dB of typical input level Veb, Vec : -20dB of typical input level Veb, Vec : variable Veb = 0mV feb=fec : variable feb=fec : variable feb=fec+50kHz
SG.E 28,32 SG.F 28,32 SG.E SG.E 28 28
Color control characteristic Ccon 1 1 Color control characteristic Ccon 2 2 TC1 TC2 Fclk Vclk TINT control characteristic 1 TINT control characteristic 2 CLK output frequency CLK output amplitude
feb=fec+50kHz feb=fec+50kHz
SG.F 28,32 SG.F 28,32 SG.C SG.C 15 15
MITSUBISHI
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Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
Symbol
Parameter
Input signal Pins SG -
Test point Min. 2.7 0.74 0.24 160 250 100 -200 1.5 1.5 1.5 -4.6 -4.6 -4.6 210 210 210 -310 -310 -310 500 500 500 -50 -50 -50 1.0
Limits Typ. 3.0 0.92 0.33 200 0 300 150 -150 3.5 3.5 3.5 -2.6 -2.6 -2.6 260 260 260 -260 -260 -260 600 600 600 100 100 0 0 0 1.3 Max. 3.3 1.10 0.42 240 10 350 200 -100 5.5 5.5 5.5 -0.6 -0.6 -0.6 310 310 310 -210 -210 -210 700 700 700 200 200 50 50 50 1.6
Unit
Remarks
RGB
VPED
Standard condition of RGB parameter Output Pedestal voltage
26 26 26 26 26
V % % mV mV mV dB dB dB dB dB dB mV mV mV mV mV mV mVpp mVpp mVpp nsec nsec mV mV mV V Difference at pedestal level Difference at pedestal level Difference at pedestal level while monitoring at pins 28, 30, 32 Vy =0.286V Vy =0.286V Vy =0.286V Vy =0.286V Vy =0.286V Vy =0.286V Vy =0.286V Vy =0.286V Vy =0.286V Vy =0.286V Vy =0.286V Vy =0.286V Vy =0.286V Vy =0.286V Vy =0.286V Vy = 0.0V
SG.D 28,30, 32 SG.H 28,32 SG.H 30,32 SG.D 28,30, 32 SG.D 28,30, 32
MTXRB Matrix ratio R/B MTXGB Matrix ratio G/B GYmax Contrast control characteristic 1 GYmin Contrast control characteristic 2
GYEclip Contrast control characteristic 5 Lum max Brightness control characteristic 2
48,49, SG.G 28,30, 51 32 26 26 26 26 26 26 26 26 26 26 26 26 26 26 51 49 48 SG.D 28,30, 32 SG.D 28,30, 32 SG.D SG.D SG.D SG.D SG.D SG.D SG.D SG.D SG.D SG.D SG.D SG.D SG.G SG.G SG.G 28 30 32 28 30 32 28 30 32 28 30 32 28 30 32
Lum min Brightness control characteristic 3 D(R)1 D(G)1 D(B)1 D(R)2 D(G)2 D(B)2 C(R)1 C(G)1 C(B)1 C(R)2 C(G)2 C(B)2 R Drive control characteristic 1 G Drive control characteristic 1 B Drive control characteristic 1 R Drive control characteristic 2 G Drive control characteristic 2 B Drive control characteristic 2 R Cut off control characteristic 1 G Cut off control characteristic 1 B Cut off control characteristic 1 R Cut off control characteristic 2 G Cut off control characteristic 2 B Cut off control characteristic 2
OSD(R) OSD (R) output level OSD(G) OSD (G) output level OSD(B) OSD (B) output level
SOSD1 OSD speed characteristic 48,49, SG.G 28,30, 1 51 32 SOSD2 OSD speed characteristic 48,49, SG.G 28,30, 2 51 32 OFF(R) Offset voltage between R and OSD(R) OFF(G) Offset voltage between G and OSD(G) OFF(B) Offset voltage between B and OSD(B) NECK Neck protector function threshold voltage 26 SG.A 40
MITSUBISHI
12
Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
Symbol
Parameter
Input signal Pins SG SG.I SG.I SG.A SG.A SG.A SG.A SG.A SG.A SG.A SG.A SG.J SG.J SG.A SG.A SG.A SG.A SG.A SG.A SG.A SG.A
Test point Min. 44 44 44 44 44 44 44 44 44 44 44 36 36 38 38 38 38 38 38 38 38 38 38 38 52 15.53 13.72 17.25 250 4.0 19.3 30 8.7 2.2 4.5 3.0 3.3 55 2.5 57 2.1 20 -35 -5 19 0 790 0.35 1.52 13
Limits Typ. 15.73 14.32 17.85 500 -500 4.5 22.3 35 10.7 4.2 6.5 3.1 3.5 60 2.8 2.5 27 -27 0 24 50 940 0.53 1.64 18 Max. 15.93 14.92 18.45 -250 5.0 25.3 40 12.7 6.2 8.5 3.2 3.7 65 3.1 63 2.9 35 -20 5 29 200 1090 0.65 1.76 23
Unit
Remarks
DEF
fH1 fH2 fH3 FPHU FPHL HPV HPTW HPD HPT1 HPT2 HPT3
Standard condition of defrection parameter Horizontal free-running frequency 1 Horizontal free-running frequency 2 Horizontal free-running frequency 3 Horizontal pull-in range (upper) Horizontal pull-in range (lower) Horizontal pulse amplitude Horizontal pulse width Horizontal pulse duty cycle Horizontal pulse timing 1 Horizontal pulse timing 2 Horizontal pulse timing variable range
17 17 26 26 26 26 26 26 26 26 17 17 26 26 26 26 26 26 26 26 26 26
kHz kHz kHz Hz Hz V sec % sec sec sec HPT2 - HPT1 V V Hz V Hz Hz Vpp % % % % sec sec (Measured value) - (Vrpo 1) msec msec sec Vary frequency of input signal. Vary frequency of input signal. while monitoring at pin 44 while monitoring at pin 44 Vary frequency of input signal. Vary frequency of input signal.
HDOWN Hold down function threshold voltage SDOWN Shut down function threshold voltage fV SVC FPVU FPVL VRsi 1 Vertical free-running frequency Service mode function Vertical pull-in frequency (upper) Vertical pull-in frequency (lower) Vertical ramp size
VRsc 1 Vertical ramp size control range 1 VRsc 2 Vertical ramp size control range 2 VLin 1 VLin 2 Vertical ramp Linearity control range 1 Vertical ramp Linearity control range 2
ramp position VRpo 1 Verticalrange 1 control ramp position VRpo 2 Verticalrange 2 control VW Vertical pulse width
VBLKW Vertical blanking width WVSS Minimum vertical sync detection width
SG.A 28,30, 32 SG.A 11
MITSUBISHI
13
Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
Electrical characteristics (MCU part)
(Vcc=5V10%, Vss = 0V, f(XIN)=8MHz, Ta=-20C to 65C, unless otherwise noted) Symbol Parameter Test conditions OSD OFF Data slicer OFF OSD ON Min. Limits Typ. Max. 15 30 60 30 mA 45 200 A Unit Test circuit
VCC = 5.5 V, f(XIN) = 8 MHz
ICC
Power source current
System operation VCC = 5.5 V, f(XIN) = 0, f(XCIN) = 32 kHz, OSD OFF, Data slicer OFF, Low-power dissipation mode set (CM5 = "0", CM6 = "1") Wait mode VCC = 5.5 V, f(XIN) = 8 MHz VCC = 5.5 V, f(XIN) = 0, f(XCIN) = 32 kHz, Low-power dissipation mode set (CM5 = "0", CM6 = "1") VCC = 5.5 V, f(XIN) = 0, f(XCIN) = 0 VCC = 4.5 V IOH = -0.5 mA VCC = 4.5 V IOL = 0.5 mA VCC = 4.5 V VCC = 5.0 V IOL = 3 mA IOL = 6 mA
1 2 25 4 100 mA A
1
10 2
VOH VOL
HIGH output voltage LOW output voltage
P10-P16, P20-P27, P30, P31, P52, P53 P00-P07, P10, P15, P16, P20-P27, P30, P31, P52, P53 P11-P14
2.4 0.4
V V
LOW output voltage VT+ - VT-
0.4 0.6 0.5 1.3 V 3
Hysteresis (See note 1) RESET, P50-P51, INT1, INT2, INT3, TIM2, TIM3, SIN, SCLK, SCL1, SCL2, SDA1, SDA2 HIGH input leak current P00-P07, P10-P16, P20-P27, P50, P51, RESET LOW input leak current P00-P07, P10-P16, P20-P27, P50, P51, RESET I 2C-BUS * BUS switch connection resistor (between SCL1 and SCL2, SDA1 and SDA2)
IIZH
VCC = 5.5 V VI = 5.5 V VCC = 5.5 V VI = 0 V VCC = 4.5 V
5
A
4
IIZL
5
A
4
RBS
130
5
Notes 1: P06, P07, P15, P23, P24 have the hysteresis when these pins are used as interrupt input pins or timer input pins. P11-P14 have the hysteresis when these pins are used as multi-master I2C-BUS interface ports. P20-P22 have the hysteresis when these pins are used as serial I/O pins. 2: Connect 0.1F or more capacitor externally between the power source pins VCC-VSS so as to reduce power source noise. Also connect 0.1F or more capacitor externally between the pins VCC-CNVSS. 3: Use a quartz-crystal oscillator or a ceramic resonator for the CPU oscillation circuit. When using the data slicer, use 8 MHz. 4: Pin names in each parameter is described as bellow. (1) Dedicated pin: dedicated pin names. (2) Double-/triple-function ports * When the same limits: I/O port name. * When the limits of functions except ports are different from I/O port limits: function pin name.
MITSUBISHI
14
Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
I C Bus Table
2
SLAVE ADDRESS= BAH(WRITE), BBH(READ)
A6 1 A5 0 A4 1 A3 1 A2 1 A1 0 A0 1 R/W 1/0
WRITE TABLE(input bytes)
SUB ADDRESS HEX BIN DATA D7 D6 D5 D4 D3 D2 D1 D0
INITIAL 02H 08H 08H A0H A0H 00H 15H 29H 28H 3BH 1EH 5EH 0EH 80H 08H 00H 40H 80H 10H 40H FFH 00H 00H 00H 00H 00H 00H 00H 00H 00H
00H 00000000 01H 00000001 02H 00000010 04H 00000100 05H 00000101 06H 00000110 07H 00000111 08H 00001000 09H 00001001 0AH 00001010 0BH 00001011 0CH 00001100 0DH 00001101 0EH 00001110 0FH 00001111 10H 00010000 11H 00010001 12H 00010010 13H 00010011 14H 00010100 15H 00010101 16H 00010110
(not asigned) 0 0 0 X-ray Enable YUV input Y/C input 0 0 0 Ped Clamp (not asigned) 0 0 0 Sharpness Delay (Front) V1 V0 V1 Sharpness Delay (Rear) V1 V0 V1 (not asigned) Y DL Time Adj. V0 V0 V0 (not asigned) V0 V0 V0 (not asigned) V0 V0 V1 (not asigned) V0 V0 V1 (not asigned) V0 V0 V1 Half Tone V0 V0 V0 RGB Matrix Ratio V1 V0 V0 OSD Comp V0 V0 V0 V1 V0 V0 (not asigned) H Free AFC1 Gain 0 0 0 (not asigned) (for evaluation) 0 0 0 (not asigned) Black Stre. SW V0 V1 V0 RGB Mute (inhibited) 1 0 0 Service SW V-Shift 0 0 0 V-Blanking Stop 0 1 0 V-Ramp Invert 1 1 1 V0 V0 V0 V0 V0 V0 (not asigned) 0 (not asigned) 0 0 V0 V0 V0 V0 V0 V0 0 I/M(D) Enable 0 0
V0 CutOff(R) MSB 17H 00010111 V0
18H 00011000
V0 CutOff(G) MSB 19H 00011001 V0
1AH 00011010
V0 CutOff(B) MSB 1BH 00011011 V0
1CH 00011100 1DH 00011101 51H 01010001
0 0 0
H Stop Power Down Mode 0 0 0 1 0 EXT input TV input Y/C through (for evaluation) 0 1 0 0 0 VRT Voltage Sync-tip Clamp 0 1 0 0 0 Shrapness Gain (Front) V0 V0 V0 V0 V0 Shrapness Gain (Rear) V0 V0 V0 V0 V0 YNR SW YNR Limitter Level V0 V0 V0 V0 V0 Sharpness Limitter Level V1 V0 V1 V0 V1 Tint Control V0 V1 V0 V0 V1 Color Control V0 V1 V0 V0 V0 Contrast Control V1 V1 V0 V1 V1 OSD Level (R) V1 V1 V1 V1 V0 OSD Level (G) V1 V1 V1 V1 V0 OSD Level (B) V1 V1 V1 V1 V0 Brightness Control V0 V0 V0 V0 V0 H Phase Control 0 1 0 0 0 2D Y/C (for evaluation) 0 0 0 0 0 (for evaluation) V0 V0 V0 V0 V0 Gamma Control 0 0 0 0 0 Hold Down Level (inhibited) 1 0 0 0 0 V-Ramp Size 0 0 0 0 0 V-Ramp Linearity 1 1 1 1 1 Cut Off (R) V0 V0 V0 V0 V0 Drive (R) V0 V0 V0 V0 V0 Cut Off (G) V0 V0 V0 V0 V0 Drive (G) V0 V0 V0 V0 V0 Cut Off (B) V0 V0 V0 V0 V0 Drive (B) V0 V0 V0 V0 V0 Intelligent Monitor (Analog) 0 0 0 0 0 Intelligent Monitor (Digital) 0 0 0 0 0 H VCO Adjust 0 0 0 0 0
NOTE: V0 / V1 ==> V- LATCH BIT
READ TABLE(output bytes)
SUB ADDRESS D7 D6 H COINCI D5 V COINCI D4 B_W D3 D2 MV_180 D1 DET NZ C Gain (not asigned) D0 K_MONI
60H 61H 62H 63H
01100000 KILLER 01100001 01100010 B2 ROM MSB 01100011
IIC_STILL B2 ROM (not asigned)
BLKDETV
MITSUBISHI
15
Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
Bus function
WRITE
FUNCTION
H STOP Power Down Input Video SW X-ray Enable Y/C through Sync-tip Clamp Ped Clamp VRT Voltage Sharpness Gain (Front) Sharpness Delay (Front) Sharpness Gain (Rear) Sharpness Delay (Rear) YNR SW YNR Limiter Level Y DL Time Adj. Sharpness Limiter Level Tint Control Color Control Contrast Control OSD Level (R) Half Tone OSD Level (G) RGB Matrix Ratio OSD Level (B) OSD Comp Brightness Control AFC2 H Phase AFC1 Gain H-free 2D Y/C Black Stretch SW Gamma Control RGB Mute Hold Down Level V Shift Service SW V-Ramp Size Test V-Ramp Linearity V-Ramp Invert Cut Off(R) Drive(R) Cut Off(G) Drive(G) Cut Off(B) Drive(B) Intelligent Monitor (Analog) Intelligent Monitor (Digital) Intelligent Monitor(D) Enable H VCO Adj.
BIT SUB DATA ADD
1 2 4 1 1 3 1 2 6 2 6 2 7 1 2 6 7 7 7 6 2 6 2 6 2 8 5 1 1 1 1 1 1 3 3 1 7 1 7 1 9 7 9 7 9 7 4 5 1 8 00H 00H 01H 01H 01H 02H 02H 02H 04H 04H 05H 05H 06H 06H 06H 07H 08H 09H 0AH 0BH 0BH 0CH 0CH 0DH 0DH 0EH 0FH 0FH 0FH 10H 11H 12H 12H 13H 13H 13H 14H 14H 15H 15H 16H 17H 17H 18H 19H 19H 1AH 1BH 1BH 1CH 1DH 1DH 51H D0 D1-D2 D3-D6 D7 D2 D0-D2 D7 D3-D4 D0-D5 D6-D7 D0-D5 D6-D7 D4 D0-D3 D5-D6 D0-D5 D0-D6 D0-D6 D0-D6 D0-D5 D6-D7 D0-D5 D6-D7 D0-D5 D6-D7 D0-D7 D0-D4 D5 D6 D4 D6 D0-D3 D7 D0-D2 D4-D6 D3 D0-D6 D7 D0-D6 D7 D0-D7 D7 D0-D6 D0-D7 D7 D0-D6 D0-D7 D7 D0-D6 D0-D3 D0-D4 D5 D0-D7
DISCRIPTION
Horizontal output switch (0: H OUT, 1: H STOP) Power down mode control (0: normal, 1: PD0, 2: PD1, 3: PD2) Video SW Selector (1: TV, 2: EXT, 4: Y/C input, 9: YUV input) X-ray protect function switch (0: X-ray Protect OFF, 1: X-ray Protect ON) Y/C separation input switch (0: Y/C Sep ON, 1: Y/C Sep. through) Sync-tip clamp switch (0: Clamp ON, 1: TV clamp OFF, 2: EXT clamp OFF, 4: Y clamp OFF) Pedestal clamp switch (0: Pedestal clamp OFF, 1: Pedestal clamp ON) Reference voltage adjustment for A/D Over-shoot gain control by 6bit Over-shoot width control (0: 0ns, 1: 70ns, 2: 140ns 3: 210ns) Pre-shoot gain control by 6bit Pre-shoot width control (0: 0ns, 1: 70ns, 2: 140ns 3: 210ns) YNR control switch (0: YNR OFF, 1: YNR ON) YNR limiter level control Delay time adjustment of luminance signal (0: 0ns, 1: 70ns, 2: 140ns 3: 210ns) Maximum level control of sharpness Tint Control by 7bit Color Saturation control by 7bit Contrast control by 7bit Digital OSD (R) level adjustment by 6bit Setting of Half Tone mode Digital OSD (G) level adjustment by 6bit RGB Matrix ratio control Digital OSD (B) level adjustment by 6bit Digital OSD threshold voltage control of input signal Brightness control by 8bit Horizontal phase adjustment by 5bit Horizontal AFC gain switch (0: Low, 1: High) Horizontal forced free-running mode switch (0: OFF, 1: Forced Free-running) Y/C separation mode switch (0: Y/C Sep ON, 1: Y/C Sep. through) Black Stretch function ON/OFF switch (0: OFF, 1: ON) RGB gamma threshold control (0:Gamma OFF) RGB signal mute ON/OFF switch (0: Mute 1: RGB output) Hold Down level adjustment by 3bit V RAMP start timing adjustment 2Line/Step Service mode switch (0: Vertical output ON, 1: Vertical output OFF) V-Ramp amplitude adjustment by 7bit No use for customer (Test mode) V-Ramp linearity adjustment by 7bit V-Ramp polarity switch R OUT pedestal level adjustment by 9bit R OUT amplitude adjustment by 7bit G OUT pedestal level adjustment by 9bit G OUT amplitude adjustment by 7bit B OUT pedestal level adjustment by 9bit B OUT amplitude adjustment by 7bit Intelligent Monitor (Analog) mode selector Intelligent Monitor (Digital) mode selector Intelligent Monitor (Digital) function switch (0: OFF, 1: ON) H VCO free-running frequency adjustment by 8bit
INITIAL NOTE
0 01 0001 0 0 000 0 01 100000 10 100000 10 0 0000 00 010101 0101001 0101000 0111011 011110 00 011110 10 011110 00 10000000 01000 0 0 0 0 0000 1 000 001 0 1000000 0 1111111 1 00000000 0 0000000 00000000 0 0000000 00000000 0 0000000 0000 00000 0 00000000
V Latch V Latch V Latch V Latch V Latch V Latch V Latch V Latch V Latch V Latch V Latch V Latch V Latch V Latch V Latch V Latch V Latch V Latch
V Latch V Latch V Latch V Latch V Latch V Latch
Read
K_MONI DET_NZ MV_180 IIC_STILL B_W V COINCI H COINCI KILLER B2ROM C Gain BLKDETV 1 1 1 1 1 1 1 1 9 2 4 60H 60H 60H 60H 60H 60H 60H 60H 61H 62H 62H 63H D0 D1 D2 D3 D4 D5 D6 D7 D0-D7 D7 D0-D1 D4-D7 C-processor Killer det. output (1: C-pro Killer ON) Noise Killer det. output (1: Noise Killer ON) Reversed Burst signal (all reversed) det. output (1: Reversed Burst) VCR Still mode det. output (1: Still mode) PLL Killer (Chroma) det. output (1: PLL Killer ON) Vertical Coincidence det. output (1: V Coincident) Horizontal Coincidence det. output (1: H Coincident) Color/Killer condition (1: color output, 0: Killer (color off) ) B2ROM output ACC amplifier status Black det. output of Black Stretch circuit
MITSUBISHI
16
Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
M65580MAP I2C bus Standard data
Sub address 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0Ah 0Bh 0Ch 0Dh 0Eh 0Fh 10h 11h 12h 13h 14h 15h 16h 17h 18h 19h 1Ah 1Bh 1Ch 1Dh data 00 08 08 21 C0 C0 00 15 40 40 40 1E 9E 1E 80 10 10 4A 8D 00 40 40 00 C0 00 C0 00 C0 00 00 Sub address 30h 31h 32h 33h 34h 35h 36h 37h 38h 39h 3Ah 3Bh 3Ch 3Dh 3Eh 3Fh 40h 41h 42h 43h 44h 45h 46h 47h 48h 49h 4Ah 4Bh 4Ch 4Dh 4Eh 4Fh data 20 05 04 81 8D 63 79 50 55 25 21 19 B3 0F 06 08 00 01 C0 04 64 3D 15 00 83 00 A0 00 15 01 6E 38 Sub address 50h 51h 52h 53h 54h 55h 56h 57h 58h 59h 5Ah 5Bh 5Ch 5Dh data 00 00 00 35 22 94 14 A6 00 A6 00 00 00 80
MITSUBISHI
17
Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
DESCRIPTION OF PIN
Pin No.
Name
Peripheral circuit of pins
Note
Power source for MCU. 0V
1
Vss (MCU)
2
2
FILT
Y
Power source for MCU. 3 Vcc (MCU) 5.0V 5%
4 5
P27/XCOUT 7 P26/FSCIN/ XCIN
4
5
MITSUBISHI
18
Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
Pin No.
Name
Peripheral circuit of pins
Note
CMOS INPUT
Impedance>100k
6
RESETB
Y
6
VOL = 0V :
Reset state
VOH = 5V :
Release from Reset state
C
CMOS IN/OUT 1
Impedance>100k (input) Impedance 250 (output)
7 8 9 10
P22/SIN/AD8 P21/SOUT/AD8 P20/SCLK/AD6 P15/AD1/ INT3/FSCIN
A
Y
C 11 A
CMOS IN/OUT 1
Impedance>100k (input) Impedance 250 (output)
11
P16/AD2/TIM2
Intelligent monitor output (Analog/Digital)
Y
12
Vss (Digital)
0V
MITSUBISHI
19
Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
Pin No.
Name
C
Peripheral circuit of pins
Note
CMOS IN/OUT 1
13 Impedance>100k (input) Impedance<100 (output)
A
13
OSD CLK
Y
14
Vdd (Digital)
Power source for Digital block. 5.0V 5%
Impedance 400
ESD PROTECT
15
CLK OUT
15
CMOS INPUT
Impedance>100k 16
VIL = 0V :
Reset state
16
RESET
VIH = 5V :
Release from Reset state Y
Sync Sep. input Impedance=N.A.
ESD PROTECT
17
C.Sync IN
17
DC 2.5V
MITSUBISHI
20
Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
Pin No.
Name
Peripheral circuit of pins
Note
Impedance 150
18
CVBS OUT
18
DC : 0.55V (sync) AC : 1.75Vp-p (typ.)
19
Vdd (Input)
Power source for A/D etc. 3.3V 5%
20 22 26
EXT(CVBS) IN Y IN TV(CVBS) IN
20 22 26
Impedance=N.A. DC : 0.5V (sync) AC : 1.0Vp-p (typ.)
21
Vss (Input)
Power source for A/D etc. 0V
23
Impedance>50
23 25
VRT VRB
25
DC : 1.7V (VRT) 0.5V (VRB)
Impedance 7.5k
24
24
C IN
DC : 1.0V AC : 0.286Vp-p (burst)
MITSUBISHI
21
Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
Pin No.
Name
Peripheral circuit of pins
Note Impedance 400
27
27
VZ OUT
DC : 2.05V
28
28 30 32
R OUT G OUT B OUT
Impedance 1k DC : 3V (blanking)
30 32
29
Vdd (Output)
Power source for D/A etc. 3.3V 5%
31
Vss (Output)
Power source for D/A etc. 0V
33
Vdd (VCXO)
Power source for VCXO etc. 5.0V 5%
34
Impedance=N.A. (Additional filter on PCB board) DC 2.9V
34
APC Filter
MITSUBISHI
22
Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
Pin No.
Name
Peripheral circuit of pins
Note
35
35
X'tal
Impedance 1k
Impedance>100k 36 X-ray Protector
ESD PROTECT
36
0.0-3.0 : Normal 3.2-3.3 : Hold down 3.7-5.0 : Shut down
37
Impedance=N.A. (Additional filter on PCB board) DC 2.5V
37
AFC1 Filter
Impedance 400 38 V RAMP OUT
38
2.5Vp-p (typ.)
39
HVCO F/B
39
Impedance=N.A. (Additional filter on PCB board) DC 3.0V
Impedance 5k 40 Neck Protector
40
0.0-1.0 : RGB off 1.6-3.0 : Normal 4.0-5.0 : Test mode
MITSUBISHI
23
Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
Pin No.
Name
Peripheral circuit of pins
Note
Power source for Deflection block. 0V Power source for Deflection block. 5.0V 5% CMOS IN/OUT 1
43 Impedance>100k (input) Impedance<100 (output)
41
Vss (DEF)
42
Vdd (DEF)
C
A
43
FBP IN
VIL = 0V :
RGB output Y
VIH = 5V :
Blanking
C 44 A
CMOS IN/OUT 1
Impedance>100k (input) Impedance<100 (output)
44
H OUT
Y
VOL : 0V VOH : 5V
CMOS IN/OUT 2
C A 45 Impedance>100k (input) Impedance<100 (output)
45
SDA
VIL : 0V VIH : 5V
Y
s
MITSUBISHI
24
Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
Pin No.
Name
Peripheral circuit of pins
Note
CMOS Schmitt IN
Impedance>100k
46
SCL
Y
s
46
VIL : 0V VIH : 5V
CMOS IN/OUT 1
C 47 A Impedance>100k (input) Impedance<100 (output)
47
Half Tone IN
VIL = 0V :
RGB output
VIH = 5V :
Y Half tone on
CMOS IN/OUT 1
C 48 49 51 Impedance>100k (input) Impedance<100 (output)
48 49 51
OSD(B) IN OSD(G) IN OSD(R) IN
A
VIL : 0V VIH : 5V
Y
C 50 A
CMOS IN/OUT 1 Impedance>100k (input) Impedance<100 (output) VIL = 0V :
RGB output
50
Fast BLK IN
Y
VIH = 5V :
OSD output
MITSUBISHI
25
Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
Pin No.
Name
C
Peripheral circuit of pins
Note
CMOS IN/OUT 1
52 Impedance>100k (input) Impedance<100 (output)
A
52
V sync OUT
Y
VOL : 0V VOH : 5V
CMOS IN/OUT 1
C 53 A Impedance>100k (input) Impedance<100 (output)
53
H sync OUT
Y
VOL : 0V VOH : 5V
CMOS INPUT
Impedance>100k Y 54
54
P51/VSYNC
CMOS IN/OUT 1
C Impedance>100k (input) Impedance<100 (output)
55 56 57 58 59
P52/R P53/OUT1 P30/G P31/B P10/OUT2
A
Y
MITSUBISHI
26
Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
Pin No.
Name
C
Peripheral circuit of pins
Note
CMOS IN/OUT 1
Impedance>100k (input) Impedance 250 (output)
60 61 62 63
P11/SCL1 P12/SCL2 P13/SDA1 P14/SDA2
A
Y
CMOS IN/OUT
64 65 66 67 68
P00/PWM0 P01/PWM1 P02/PWM2 P03/PWM3 P04/PWM4
Y
Impedance>100k (input) Impedance 250 (output)
CMOS IN/OUT
Impedance>100k (input) Impedance 250 (output)
69 70
P05/AD3 P06/INT2/AD4
Y
CMOS IN/OUT
71 Impedance>100k (input) Impedance 250 (output)
71
P07/INT1
Y
MITSUBISHI
27
Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
Pin No.
Name
C
Peripheral circuit of pins
Note CMOS IN/OUT 1
Impedance>100k (input) Impedance<100 (output)
A
72 73
P23/TIM3 P24/TIM2
Y
C 74 A
CMOS IN/OUT 1
Impedance>100k (input) Impedance 250 (output)
74
P25/AD5
Y
75
75
HLF
Impedance=N.A. (Additional filter on PCB board)
76
VHOLD
76
77
CV IN
77
MITSUBISHI
28
Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
Pin No.
Name
Peripheral circuit of pins
Note
CMOS IN/OUT
78
78
CN VSS
Impedance>100k (input) Impedance 250 (output)
79 80
X IN X OUT
79
80
MITSUBISHI
29
Preliminary
Note : This is not a final specification. Some of information in this document are subject to changes.
Mitsubishi Semiconductor
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
MEMORY MAP
Mask ROM version
000016 00BF16 00C016 00FF16 010016 01FF16 020016 020F16 030016 032016 05BF16 OSD RAM (128 bytes) (note) Not used 080016 087F16 Zero page SFR1 area 1000016
RAM (1152 bytes)
SFR2 area Not used ROM correction function Vector 1: addresses 030016 Vector 2: addresses 032016 OSD ROM (10K bytes) 1140016 13BFF16
Not used
Not used
600016
Not used Not used
ROM (40K bytes) FF0016 FFDE16
Interrupt vector area
Special page 1FFFF16
FFFF16
MITSUBISHI
30

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